KAIST Researchers Develop Transistor for Hardware-Based Time-Locked Cryptography

Researchers at the Korea Advanced Institute of Science and Technology (KAIST) have developed a semiconductor transistor that enforces timing conditions on encrypted data directly at the hardware level, as reported by TechXplore (https://techxplore.com/news/2026-10-hardware-method-condition-decoding-encrypted.html). The approach relies on physical state changes inside the microelectronic device to ensure information—such as examination questions or auction bids—remains unreadable until a set duration passes or can only be deciphered during a specific time window.

The research was conducted in KAIST's Department of Materials Science and Engineering, with Ph.D. candidate Huisu Noh as first author and professor Kyung Min Kim as corresponding author. Their findings were published online in Advanced Materials on Sept. 10, 2026. While time-based encryption has been studied previously, the KAIST team's design relies on physical mechanisms within the semiconductor rather than external system clocks or standalone software.

The team achieved this by developing a dual-state programmable oxide transistor (DUPOT), which independently manages long-term memory and short-term memory within a single component. Conventional memory transistors store data by altering their threshold voltage—the level at which electrical current starts to flow. The DUPOT independently controls both the threshold voltage and the saturation current, which is the current level sustained under fixed operating conditions.

These two states rely on distinct physical mechanisms. Applying a positive voltage to the gate terminal traps electrons inside an insulating layer of hafnium oxide (HfO₂), shifting the threshold voltage. Because this state persists for an extended duration, it acts as long-term memory to set the baseline reference. Applying a negative voltage causes oxygen ions to migrate to the interface between the insulating layer and the conduction channel, reducing saturation current. Once voltage is removed, the oxygen ions gradually redistribute and current recovers over time, creating a time-varying short-term memory state.

Using transistor arrays, the researchers demonstrated two encryption modes. In time-release encryption, the current difference between the target pattern and background widened over time, allowing the letter 'T' to become readable after 8.4 seconds. In time-bound encryption, a decoy letter 'K' appeared at 1.5 seconds, while the target letter 'T' appeared only at the designated 37-second mark, showing how the array presents different outputs depending on readout timing.

The team also proposed a security model for cloud environments where data is stored on remote servers. In this setup, matching time conditions are applied separately to the ciphertext on the server and to the user's decryption key. Combining the two restores the original information only when the time conditions match. The researchers noted that the hardware cannot revoke access to copies of decrypted data that have already been obtained.

Looking ahead, the team plans to lower operating voltages and improve device-to-device uniformity and consistency across repeated cycles. The researchers also aim to adapt the transistor architecture for neuromorphic hardware designed to mimic biological brain functions.